Developing 3D technology to stack small chips: Opening a new era of semiconductors from Japan

Q1. What inspired you to become a researcher?

A1. Wanting to understand how robots move

Since childhood, I've loved robot anime and new gadgets, and while wondering "how are they able to move like that?", my interest in manufacturing began. When I joined a laboratory during graduate school, semiconductor research in Japan was in significant decline, so I thought, "If I want to challenge myself, I need to go abroad."

So, during my doctoral program, in 2011, I participated in an internship at imec, a world-leading semiconductor research institution based in Belgium. I had no local connections and applied via the internet. After obtaining my degree, I continued at imec as a researcher for about 10 years, where I was able to engage in cutting-edge research.

Since then, I've been working on developing three-dimensional (3D) integration technology for semiconductors. Semiconductors have improved their performance by advancing the microprocessing of integrated circuits. However, in recent years, investment costs have increased, and technical limitations are approaching. To overcome this situation and further improve semiconductor performance, I felt it was necessary to develop efficient packaging technology in the back-end process area.

Q2. What research are you currently working on?

A2. "Hybrid bonding" using plasma

Instead of creating large integrated circuits as single chips, as has been done conventionally, I'm working on developing "3D chiplet technology." This technology involves manufacturing multiple smaller chips, stacking them three-dimensionally, and packaging them. By stacking small chips three-dimensionally like blocks and connecting them, we can reduce defect rates during manufacturing, shorten wiring distances between chips, save power, and achieve higher performance.

However, to connect chips more precisely, we need a technology called "hybrid bonding," which uses plasma rather than conventional soldering. Furthermore, in my JST PRESTO program, I'm applying semiconductor 3D chiplet technology to quantum systems, with the goal of creating hetero quantum computers. To create chiplet technology for quantum computers, it's essential to change materials to accommodate extremely low-temperature operating environments and superconductivity, and to establish efficient wiring and bonding technologies.

Quantum computers are still a new technology, but an era of mass production will eventually come. Looking ahead to the new era, I want to solve technical challenges one by one, advancing both next-generation semiconductor technology and quantum development simultaneously. In 2024, I was also selected for JST's A-STEP Industry-Academia Collaboration Stage II (full-fledged phase). I hope to accelerate more practical research toward social implementation through industry-academia collaboration.

Q3. What advice would you give to aspiring researchers?

A3. Dive into the future with curiosity

The interesting aspect of this research is that current research may be put into practical use in 10 years, making societal contribution easily understandable. On the other hand, because evolution happens so quickly, we must accurately grasp the near future and create technologies that society truly needs.

With this in mind, I established the "3DHI" consortium to promote open innovation beyond corporate and academic frameworks. Additionally, I serve as Vice Director of the Semiconductor and Quantum Integrated Electronics Research Center established in 2024. I want to become a hub connecting all researchers and different domains, pioneering Japan's semiconductor industry.

Although you may not see them in your daily life, semiconductors are essential for the development of smartphones, self-driving cars, and more. How semiconductors work inside devices and how they will evolve in the future—I hope those aspiring to be researchers will dive into the world of semiconductors with curiosity.

(Article: Kayo Murakami)