'Voice command recognition AI,' which analyzes human keywords and converts them into commands to operate devices, is rapidly emerging as a new machine interface. However, as the number of recognizable commands increases, power consumption also increases.
A research group led by Lecturer Atsutake Kosuge of the School of Engineering at the University of Tokyo attempted to apply an AI processor called a 'wired-logic architecture.' This processor type imitates the human cerebrum. By integrating the entire neural network's neurons and synapses on a chip, it minimizes data transfer and memory communication, reducing power consumption for image classification tasks. However, to implement a voice recognition AI with 35 different commands, the research group estimated that over 30 chips would be required, that necessitates the reduction of massive mounting area and substantial cost.
In response to this issue, in addition to the technology to simplify neural nets and significantly reduce the number of neurons and synapses, the research group proposed a novel approach to reduce the bit width and area of neuron circuits. Additionally, they also proposed a new technology to optimize AI models by re-importing neuronal circuits. By implementing all neurons and synapses in a 16-layer deep neural network on a single chip, the new AI processor reduced power consumption to less than 1/2552 of conventional technologies.
The AI processor developed in this research can run an AI capable of high-precision recognition with the minimal power of a single dry cell battery. In the future, the new AI processor is expected to be applied to smartphones, drones, in-car entertainment equipment control, and AR/VR equipment.
In a performance comparison with a conventional voice command recognition processor (ISSCC'22), it was confirmed that power consumption can be reduced to 1/2552 or less (right).